Introduction to FPGA Part 4 - Clocks and Procedural Assignments | Digi-Key Electronics

A field-programmable gate array (FPGA) is an integrated circuit (IC) that lets you implement custom digital circuits. You can use an FPGA to create optimized digital logic for things like digital signal processing (DSP), machine learning, and cryptocurrency mining. Because of the FPGA’s flexibility, you can often implement entire processors using its digital logic. You can find FPGAs in consumer electronics, satellites, and in servers used to perform specialized calculations. In this series, we will see how an FPGA works and demonstrate how to create custom digital logic using the Verilog hardware description language (HDL). Previously, we showed how to use continuous assignment statements to create custom digital circuits with logic gates using Verilog (/watch/)kdH4PoBfV4AfH . In this episode, we demonstrate how to use procedural assignments to create sequential hardware logic. The solution to the challenge at the end of the episode can be found here: https://www.digikey.com/en/maker/projects/introduction-to-fpga-part-4-clocks-and-procedural-assignments/356e12284daf48b5bd9b80af8a6ac5b8 All code examples and solutions for this series can be found here: https://github.com/ShawnHymel/introduction-to-fpga We start by showing how the D flip-flop in an FPGA logic cell can be used to store a 1-bit value for one or (potentially) more clock cycles. Multiple D flip-flops can be combined with combinational logic gates to create hardware circuits that operate sequentially. We can control this sequential logic through Verilog blocks known as “procedural assignment statements.” Next, we demonstrate a procedural assignment statement by constructing a simple 4-bit counter inside of an “always block.” Each time a button is pressed, the value increments by 1. The counter value is shown on the LEDs (in binary). Note that you will likely experience button bounce that we have not accounted for in the demonstration. As a result, the counter will likely skip values each button press. You would need to implement button debounce circuitry (either in hardware or in HDL) to correct for this behavior. We will cover button debounce in a future episode. Your challenge is to create a clock divider for the onboard 12 MHz oscillator (assuming you are using the iCEstick, the 12 MHz oscillator is connected to pin 21). The clock should be divided to 1 Hz, and this new clock signal should run the counter shown in the video. The new counter should increment on its own once per second. Product Links: https://www.digikey.com/en/products/detail/lattice-semiconductor-corporation/ICE40HX1K-STICK-EVN/4289604 Related Videos: /watch/sfrn-ddlO8zln /watch/Ehcm76XXNk5Xm /watch/88BA6QLxcwixA Related Project Links: https://www.digikey.com/en/maker/projects/introduction-to-fpga-part-4-clocks-and-procedural-assignments/356e12284daf48b5bd9b80af8a6ac5b8 Related Articles: https://www.digikey.com/en/pdf/r/renesas-electronics-america/powering-fpga-applications https://www.digikey.com/en/videos/d/dsp/edge-machine-deep-learning-on-fpga Learn more: Maker.io - https://www.digikey.com/en/maker Digi-Key’s Blog – TheCircuit https://www.digikey.com/en/blog Connect with Digi-Key on Facebook https://www.facebook.com/digikey.electronics/ And follow us on Twitter https://twitter.com/digikey

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